A new automatic IC mask layout code is described which avoids most of the problems inherent in the present generation of layout codes such as lack of flexibility ~ inefficient use of area, and restricted design complexity. The structured hierarchical lay-out approach, construction graphs, and placement and routing algorithms are outlined
In the past decades, semiconductor technologies have significantly contributed to the modern society...
In integrated circuit design, layout generation is tedious, time-consuming and error-prone. Motivate...
Because of the increasing complexity of the designs, there is a great necessity for automatic layout...
The program CELLINEX presented in the paper finds the cellular interconnections from the layout of...
This thesis presents the development of a layout automator for VLSI circuit design using a standard ...
Thesis (Ph. D.)--University of Rochester. Dept. of Computer Science, 1984. Simultaneously published ...
This paper describes an innovative analog IC layout generation tool, LAYGEN II, based on evolutionar...
As the technology advances, millions of transistors can be integrated on a small chip area. With the...
In this paper, a layout synthesis tool for the design of analog integrated circuits (ICs) is present...
[[abstract]]The LES expert system for layout generation of random logic modules in a hierarchical CM...
This book introduces readers to a variety of tools for analog layout design automation. After discus...
This book presents an innovative methodology for the automatic generation of analog integrated circu...
Automatic layout generation techniques can be used to generate layouts in arbitrary technologies if ...
[[abstract]]An automatic layout generation system, called LiB, for the small-scale integrated (SSI) ...
133 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1987.This thesis addresses the pro...
In the past decades, semiconductor technologies have significantly contributed to the modern society...
In integrated circuit design, layout generation is tedious, time-consuming and error-prone. Motivate...
Because of the increasing complexity of the designs, there is a great necessity for automatic layout...
The program CELLINEX presented in the paper finds the cellular interconnections from the layout of...
This thesis presents the development of a layout automator for VLSI circuit design using a standard ...
Thesis (Ph. D.)--University of Rochester. Dept. of Computer Science, 1984. Simultaneously published ...
This paper describes an innovative analog IC layout generation tool, LAYGEN II, based on evolutionar...
As the technology advances, millions of transistors can be integrated on a small chip area. With the...
In this paper, a layout synthesis tool for the design of analog integrated circuits (ICs) is present...
[[abstract]]The LES expert system for layout generation of random logic modules in a hierarchical CM...
This book introduces readers to a variety of tools for analog layout design automation. After discus...
This book presents an innovative methodology for the automatic generation of analog integrated circu...
Automatic layout generation techniques can be used to generate layouts in arbitrary technologies if ...
[[abstract]]An automatic layout generation system, called LiB, for the small-scale integrated (SSI) ...
133 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1987.This thesis addresses the pro...
In the past decades, semiconductor technologies have significantly contributed to the modern society...
In integrated circuit design, layout generation is tedious, time-consuming and error-prone. Motivate...
Because of the increasing complexity of the designs, there is a great necessity for automatic layout...