Add to ORKGBachelor thesis is dealing with a cipher standard AES and with a design of encryption and decryption components for AES in special modes of operation. Programming language is VHDL. In theoretical part of thesis is a further descriptions of AES and behaviour of block cipher operation modes. Furthermore the brief description of VHDL, FPGA and NetCOPE framework is a piece of theoretical part as well. The practical part contains designs which are made in developing environment Vivado from Xilinx. Programmed modes of operation are ECB, CBC, CTR and CFB. Simulation outputs and synthesis results are summerized in tables
This work deals with the possibility of acceleration algorithm using reconfigurable FPGA circuits an...
Nowadays, the security of data is playing an increasingly important role in the data transfer. The e...
We propose an efficient hardware architecture design & implementation of Advanced Encryption Standar...
This bachelor’s thesis describes methods of data encryption and author’s own implementation on FPGA....
The goal of this thesis is to design a hardware realization of circuit which will implement the AES ...
The thesis deals with the design and implementation of the encryption algorithms DES and AES, operat...
Tato bakalářská práce má za cíl představení šifry AES a její implementaci v jazyce VHDL pro obvod ty...
Tato bakalářská práce se zabývá návrhem AES algoritmu pro programovatelné obvody (FPGA). Nejprve je ...
Abstract — The importance of cryptography applied to security in electronic data transactions has ac...
This diploma’s thesis discourses the cryptographic systems and ciphers, whose function, usage and pr...
This paper details Implementation of the Encryption algorithm AES under VHDL language In FPGA by usi...
The National Institute of Standards and Technology (NIST) has initiated a process to develop a Feder...
This bachelor thesis deals with implementation of block cipher Twofish on the FPGA platform in VHDL ...
Tematem artykułu jest implementacja standardu szyfrowania danych AES-128 w układach reprogramowalnyc...
The National Institute of Standards and Technology (NIST) created a new standard known as Advanced E...
This work deals with the possibility of acceleration algorithm using reconfigurable FPGA circuits an...
Nowadays, the security of data is playing an increasingly important role in the data transfer. The e...
We propose an efficient hardware architecture design & implementation of Advanced Encryption Standar...
This bachelor’s thesis describes methods of data encryption and author’s own implementation on FPGA....
The goal of this thesis is to design a hardware realization of circuit which will implement the AES ...
The thesis deals with the design and implementation of the encryption algorithms DES and AES, operat...
Tato bakalářská práce má za cíl představení šifry AES a její implementaci v jazyce VHDL pro obvod ty...
Tato bakalářská práce se zabývá návrhem AES algoritmu pro programovatelné obvody (FPGA). Nejprve je ...
Abstract — The importance of cryptography applied to security in electronic data transactions has ac...
This diploma’s thesis discourses the cryptographic systems and ciphers, whose function, usage and pr...
This paper details Implementation of the Encryption algorithm AES under VHDL language In FPGA by usi...
The National Institute of Standards and Technology (NIST) has initiated a process to develop a Feder...
This bachelor thesis deals with implementation of block cipher Twofish on the FPGA platform in VHDL ...
Tematem artykułu jest implementacja standardu szyfrowania danych AES-128 w układach reprogramowalnyc...
The National Institute of Standards and Technology (NIST) created a new standard known as Advanced E...
This work deals with the possibility of acceleration algorithm using reconfigurable FPGA circuits an...
Nowadays, the security of data is playing an increasingly important role in the data transfer. The e...
We propose an efficient hardware architecture design & implementation of Advanced Encryption Standar...