Design-space exploration for CMOS photonic processor networks
- Stojanovic, Vladimir Marko
- Joshi, Ajay J.
- Batten, Christopher
- Kwon, Yong-Jin
- Beamer, Scott
- Chen, Sun
- Asanovic, Krste
Publication date
March 2010
DOI Publisher
Institute of Electrical and Electronics Engineers (IEEE)Abstract
Monolithically integrated dense WDM photonic network topologies optimized for loss and power footprint of optical components can achieve up to 4x better energy-efficiency and throughput than electrical interconnects in core-to-core, and 10x in core-to-DRAM networks.United States. Defense Advanced Research Projects Agency (Award W911NF-08-1-0134)United States. Defense Advanced Research Projects Agency (Award W911NF-08-1-0139
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