The introduction of multicore/multithreaded processors, comprised of a large number of hardware contexts (virtual CPUs) that share resources at multiple levels, has made process scheduling, in particular assignment of running threads to available hardware contexts, an important aspect of system performance. Nevertheless, thread assignment of applications running on state-of-the art processors is an NP-complete problem. Over the years, numerous studies have proposed heuristic-based algorithms for thread assignment. Since the thread assignment problem is intractable, it is in general impossible to know the performance of the optimal assignment, so the room for improvement of a given algorithm is also unknown. It is therefore hard to decide wh...
Current architectures of multicore machines are becoming increasingly complex due to hierarchical de...
International audienceWith the introduction of multi-core processors, thread affinity has quickly ap...
As multi-core processors are becoming common, vendors are starting to explore trade offs between the...
© 2013 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for a...
This thesis presents cross-domain approaches that improve the effective use of multithreaded archite...
In processors with several levels of hardware resource sharing, like CMPs in which each core is an S...
The emergence of multicore and manycore processors is set to change the parallel computing world. Ap...
capable of executing instructions from multiple threads in the same cycle. SMT in fact was introduce...
State-of-the-art high-performance processors like the IBM POWER5 and Intel i7 show a trend in indust...
The current trend to move from homogeneous to heterogeneous multi-core systems promises further perf...
In future large-scale multi-core microprocessors, hard errors and process variations will create dyn...
International audienceNowadays, NUMA architectures are common in compute-intensive systems. Achievin...
We present a user-level thread scheduler for shared-memory multiprocessors, and we analyze its perfo...
This paper evaluates new techniques to improve performance and efficiency of Chip MultiProcessors (C...
We present a user-level thread scheduler for shared-memory multiprocessors, and we analyze its perfo...
Current architectures of multicore machines are becoming increasingly complex due to hierarchical de...
International audienceWith the introduction of multi-core processors, thread affinity has quickly ap...
As multi-core processors are becoming common, vendors are starting to explore trade offs between the...
© 2013 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for a...
This thesis presents cross-domain approaches that improve the effective use of multithreaded archite...
In processors with several levels of hardware resource sharing, like CMPs in which each core is an S...
The emergence of multicore and manycore processors is set to change the parallel computing world. Ap...
capable of executing instructions from multiple threads in the same cycle. SMT in fact was introduce...
State-of-the-art high-performance processors like the IBM POWER5 and Intel i7 show a trend in indust...
The current trend to move from homogeneous to heterogeneous multi-core systems promises further perf...
In future large-scale multi-core microprocessors, hard errors and process variations will create dyn...
International audienceNowadays, NUMA architectures are common in compute-intensive systems. Achievin...
We present a user-level thread scheduler for shared-memory multiprocessors, and we analyze its perfo...
This paper evaluates new techniques to improve performance and efficiency of Chip MultiProcessors (C...
We present a user-level thread scheduler for shared-memory multiprocessors, and we analyze its perfo...
Current architectures of multicore machines are becoming increasingly complex due to hierarchical de...
International audienceWith the introduction of multi-core processors, thread affinity has quickly ap...
As multi-core processors are becoming common, vendors are starting to explore trade offs between the...