An Approach for Low Power CMOS Design

Power dissipation has emerged an important parameter in design of Low Power CMOS circuits. For this level\ud converter and dual supply voltage assignments are used to reduce the power dissipation and propagation delay.\ud In this paper, variable supply-voltage scheme (dual-VS scheme) for dual power supplies along with voltage\ud level converter is presented. Also paper presents an overall comparative analysis among various methods to\ud achieve voltage level shifter even in lower technology comparative to higher ones and help user to select the\ud best methods for same at this technology