An Array Processor Design Methodology for Real-Time Systems

Jayasinghe, J.A.K.S.
Moelaert El-Hadidy, F.
Herrmann, O.E.

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Publication date

June 1991

DOI

10.1109/iscas.1991.176194

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Abstract

An array processor design methodology suitable for hard real-time systems is presented. Scheduling and projection of the dependence graph (DG) are solved using integer programming. By exploring the regularity of the DG it is possible to solve the necessary IP problems in an efficient manner. This methodology provides a unified approach for linear and nonlinear projection of regular and partially regular DG

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An Array Processor Design Methodology for Real-Time Systems

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An Array Processor Design Methodology for Real-Time Systems

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