On-chip, CMOS-compatible, hardware-compressive integrated photonic beamformer based on WDM

We propose and experimentally demonstrate a novel, hardware-compressive architecture for broadband and continuously tunable integrated optical true-time-delay beamformers. The architecture is based on on-chip wavelength division multiplexing (WDM) that, in conjunction with the frequency-periodic response of optical ring resonator (ORR) filters, dramatically reduces the network complexity and, in turn, its area occupation on the wafer. This allows the integration of an unprecedented number of delay channels on a single chip, overcoming the main limitation of current integrated beamformers, that is, the limited capability to feed very large arrays when using a single chip. Based on this technique, a novel device is realized with TriPleXTM waveguide technology, using CMOScompatible fabrication equipment, and its functionality is demonstrated over the instantaneous 2-10 GHz bandwidth. At the best of our knowledge, this results represent at the same time the record instantaneous bandwidth (8 GHz) for an optical beamformer based on optical ring resonators(ORR), and the first demonstration of an integrated beamformer where signals from different antenna elements are processed simultaneously by individual delay lines, exploiting the periodic response of ORRs