Voice Activity Detector of Wake-Up-Word Speech Recognition System Design on FPGA

A typical speech recognition system is push-to-talk operated that requires activation. However for those who use\ud hands-busy applications, movement may by restricted or impossible. One alternative is to use Speech-Only\ud Interface. The proposed method that is called Wake-Up-Word Speech Recognition (WUW-SR) that utilizes\ud speech only interface. A WUW-SR system would allow the user to activate systems (Cell phone, Computer,\ud etc.) with only speech commands instead of manual activation. The trend in WUW-SR hardware design is\ud towards implementing a complete system on a single chip intended for various applications. This paper presents\ud an experimental FPGA design and implementation of a novel architecture of a real time feature extraction\ud processor that includes: Voice Activity Detector (VAD), and features extraction, MFCC, LPC, and\ud ENH_MFCC. In the WUW-SR system, the recognizer front-end with VAD is located at the terminal which is\ud typically connected over a data network(e.g., server)for remote back-end recognition. VAD is responsible for\ud segmenting the signal into speech-like and non-speech-like segments. For any given frame VAD reports one of\ud two possible states: VAD_ON or VAD_OFF. The back-end is then responsible to score the features that are\ud being segmented during VAD_ON stage. The most important characteristic of the presented design is that it\ud should guarantee virtually 100% correct rejection for non-WUW (out of vocabulary words - OOV) while\ud maintaining correct acceptance rate of 99.9% or higher (in vocabulary words - INV). This requirement sets apart\ud WUW-SR from other speech recognition tasks because no existing system can guarantee 100% reliability by\ud any measure