Implementation of Edge Detection Digital Image Algorithm on a FPGA

This paper presents the implementation of an adaptive contour detection filter on field programmable gate array (FPGA) using a combination of hardware and software components. The proposed system locates contours from a calculation of Gradient in preferred directions while quantifying the importance of the outline with a wise thresholding. The dedicated algorithm is implemented in an FPGA Xilinx Spartan 6, and results are displayed in a VGA monitor. The FPGA offers the necessary performance for image processing and video in real time, while maintaining the flexibility of the system to support an adaptive algorithm. Simulation results and synthesis proposed edge detection processor on FPGA chip demonstrate the efficiency of proposed architecture