Optimizing Energy During Systems Synthesis of Computer Intensive Realtime Applications

Optimizing energy during the synthesis of VLSI systems for realtime-constrained embedded applications is an important new problem. This paper presents a new methodology for simultaneous scheduling and allocation of VLSI systems which minimize estimated energy for large realtime compute intensive applications. Minimization of estimated energy and VLSI chip area using hierarchical decomposition, bin packing algorithms and integer linear programming techniques along with voltage scaling is performed. Common subexpression elimination, precomputation, data regeneration, and loop merging transformations are supported. A large complex real industrial application, audio compression, donated by Motorola, is used to study the energy savings using different single and multichip system implementations. Results of synthesizing this complex application show that up to 10 times improvement in estimated energy are attainable for only 2.7 times increase in estimated chip area. Precomputation and other low energy transformations provided on average over 1.6 times savings in energy respectively. This research is important for industry since energy dissipation consideration at the early stages of design is crucial for mapping high performance applications into cost-efficient and reliable systems