International audienceIn this paper we introduce an extension of behavioral synthesis to the configuration of an entire system by regrouping synthesizable and nonsynthesizable blocks and by using the concepts of architecture personalization. This renders the resulting architecture at the register transfer level more flexible. The main issue of the architecture personalization is the generation of complete system descriptions compatible with existing RTL simulation and synthesis tools. The personalization scheme presented has been integrated within the Amical behavioral synthesis environment and has been applied successfully to several examples
One of the major problems within the VHDL based behavioral synthesis is to start the design on highe...
Existing techniques in high-level synthesis mostly assume a simple controller architecture model in ...
This thesis presents an interactive High Level Synthesis environment called AMICAL. The synthesis pr...
This paper deals with the integration of an architectural synthesis tool within the existing CAD env...
The analysis of an architecture may provide statistic information on the use of the resources and on...
This paper deals with integrating an interactive simulator within a behavioral synthesis tool, there...
The microelectronics industry has been undergoing a pace of change in order to cope with the increas...
This paper deals with integrating an interactive simulator within a behavioral synthesis tool, there...
In this paper we discuss the generation of reprogrammable controllers. This generation is performed ...
The AMICAL architectural synthesis system starts with a behavioral specification given in VHDL, perf...
Behavioral synthesis takes an algorithmic description of the circuit where there is neither clock in...
ISBN 2-913329-33-0This thesis develops a new synthesis methodology based on an interactive and flexi...
International audienceImprovement in the quality of integrated circuit designs and adesigner's produ...
This thesis presents a contribution to the domain of silicon compilation. It deals with the integrat...
By allowing higher-level descriptions, behavioral synthesis helps to cope with the growing chips\u27...
One of the major problems within the VHDL based behavioral synthesis is to start the design on highe...
Existing techniques in high-level synthesis mostly assume a simple controller architecture model in ...
This thesis presents an interactive High Level Synthesis environment called AMICAL. The synthesis pr...
This paper deals with the integration of an architectural synthesis tool within the existing CAD env...
The analysis of an architecture may provide statistic information on the use of the resources and on...
This paper deals with integrating an interactive simulator within a behavioral synthesis tool, there...
The microelectronics industry has been undergoing a pace of change in order to cope with the increas...
This paper deals with integrating an interactive simulator within a behavioral synthesis tool, there...
In this paper we discuss the generation of reprogrammable controllers. This generation is performed ...
The AMICAL architectural synthesis system starts with a behavioral specification given in VHDL, perf...
Behavioral synthesis takes an algorithmic description of the circuit where there is neither clock in...
ISBN 2-913329-33-0This thesis develops a new synthesis methodology based on an interactive and flexi...
International audienceImprovement in the quality of integrated circuit designs and adesigner's produ...
This thesis presents a contribution to the domain of silicon compilation. It deals with the integrat...
By allowing higher-level descriptions, behavioral synthesis helps to cope with the growing chips\u27...
One of the major problems within the VHDL based behavioral synthesis is to start the design on highe...
Existing techniques in high-level synthesis mostly assume a simple controller architecture model in ...
This thesis presents an interactive High Level Synthesis environment called AMICAL. The synthesis pr...