Synthesis of QDI asynchronous circuits from DTL-style petri-net

International audienceIn this paper, a general methodology for synthesizing Quasi-Delay Insensitive (QDI) asynchronous circuits is presented. It starts from a Peri Net model reinforced by the DataTransfer Level (DTL) specification. Even though QDI circuit is the main focus of the paper, DTL-based synthesis can apply to any style of asynchronous circuits. The main steps of the compilation process are described. As an illustration, an example is studied and processed in details