A pseudo-random number generator is presented which makes optimal use of the architecture of the i860-microprocessor and which is expected to have a very long period. It is therefore a good candidate for use on the parallel supercomputer Paragon XP. In the assembler version, it needs 6.4 cycles for a real∗4 random number. There is a FORTRAN routine which yields identical numbers up to rare and minor rounding discrepancies, and it needs 28 cycles. The FORTRAN performance on other microprocessors is somewhat better. Arguments for the quality of the generator and some numerical tests are given
We consider the requirements for uniform pseudo-random number generators on modern vector and paral...
The article presents approach to implementation of random number generator on FPGA unit. The objecti...
A significant problem faced by scientific investigation of complex modern systems is that credible s...
We consider the requirements for uniform pseudo-random number generators on modern vector and parall...
We consider the requirements for uniform pseudo-random number generators on modern vector and parall...
To help promote more widespread adoption of hardware acceleration in parallel scientific computing, ...
To help promote more widespread adoption of hardware acceleration in parallel scientific computing, ...
Fast and reliable pseudo-random number generators are required for simulation and other applications...
Random number generators are used in many applications, from slot machines to simulations of nuclear...
We consider the requirements for uniform pseudo-random number generators on modern vector and parall...
Simulations on parallel computors require distinct streams of pseudo-random deviates for each proces...
ii A simple and inexpensive pseudo-random number generator has been designed and built using linear ...
The article presents approach to implementation of random number generator in FPGA unit. The objecti...
In this article Re present background, rationale, and a description of the Scalable Parallel Random ...
In this article we present background, rationale, and a description of the Scalable Parallel Random ...
We consider the requirements for uniform pseudo-random number generators on modern vector and paral...
The article presents approach to implementation of random number generator on FPGA unit. The objecti...
A significant problem faced by scientific investigation of complex modern systems is that credible s...
We consider the requirements for uniform pseudo-random number generators on modern vector and parall...
We consider the requirements for uniform pseudo-random number generators on modern vector and parall...
To help promote more widespread adoption of hardware acceleration in parallel scientific computing, ...
To help promote more widespread adoption of hardware acceleration in parallel scientific computing, ...
Fast and reliable pseudo-random number generators are required for simulation and other applications...
Random number generators are used in many applications, from slot machines to simulations of nuclear...
We consider the requirements for uniform pseudo-random number generators on modern vector and parall...
Simulations on parallel computors require distinct streams of pseudo-random deviates for each proces...
ii A simple and inexpensive pseudo-random number generator has been designed and built using linear ...
The article presents approach to implementation of random number generator in FPGA unit. The objecti...
In this article Re present background, rationale, and a description of the Scalable Parallel Random ...
In this article we present background, rationale, and a description of the Scalable Parallel Random ...
We consider the requirements for uniform pseudo-random number generators on modern vector and paral...
The article presents approach to implementation of random number generator on FPGA unit. The objecti...
A significant problem faced by scientific investigation of complex modern systems is that credible s...