Design of CMOS Image Sensor with Linear Readout Amplifier

Conventional image sensors use simple NMOS Source follower to read out the photodiode signal. The linearity of the source follower is limited, especially for large voltage swings. This is problematic in low-power applications with reduced supply voltage. Non-linear response can lead to color artifacts in the final image. In this project a new buffer amplifier with closed loop feedback proposed by Ali Dadashi is used to improve the linearity significantly. The proposed circuit has already been implemented in a test chip using EUROPRACTICE and TSMC 90 nm process. The goal of this project is to implement such circuit together with a pixel array and row/column address decoders, and compare the linearity of the proposed buffer with conventional readout methods, as well as to construct a digital camera for use in education and research. This project involves designing of pixel array, row/column decoders, readout circuitry utilizing noise reduction techniques, such as correlated double sampling and differential delta sampling, and writing and implementing a simple camera controller in an FPGA, as well as to create software to interface the camera for configuration and image extraction from the image sensor