Logarithmic Number System Based Arithmetic Operations

Namen te diplomske naloge je raziskovanje logaritmičnega številska sistema (LNS) kot alternativa plavajoči vejici (FL). Zanimale nas so binarna reprezentacija, implementacija aritmetike v logiki, numerične napake pri aritmetični operacijah in smiselnost uporabe LNS. Omejili smo se na 16-bitni LNS v bazi e. Z uporabo teorije iz enakomerne aproksimacije s polinomi smo implementirali model za aproksimacijo Gaussovih logaritmov, ki jih potrebujemo pri seštevanju in odštevanju. Aritmetično enoto v 16-bitnem LNS v bazi e smo na koncu implementirali v FPGA. Pri predpostavki, da znamo dobro implementirati pretvorbo iz LNS v FP in obratno, lahko na tak način z manjšimi spremembami implementirano aritmetično enoto uporabimo za sisteme, ki so numerično zahtevni, a ne potrebujejo natančnih končnih izračunov.In this thesis, we discuss the logarithmic number system and its applications as an alternative to FP. We were interested in its binary representation, logical implementation of arithmetic and the numerical errors associated with it, and the arguments we can make in its favor. In particular, we focused on 16-bit LNS in base e. Using the theory of uniform approximation, a model was built for the approximation of the Gaussian logarithms needed to add and subtract in LNS. Finally, the arithmetic unit in 16-bit LNS in base e was implemented in FPGA. Assuming there is an efficient LNS to FP (and vice versa) conversion method available, we believe our implementations have applications in numerically demanding systems that do not require a high degree of accuracy in their calculations