Light coupling and light trapping in alkaline etched multicrystalline silicon wafers for solar cells

The reflection reducing and light trapping properties of alkaline etched multicrystalline silicon wafers are investigated experimentally. Following an overview of various chemical texturisation methods and their effect upon the surface morphology, a high concentration saw-damage etch and a low concentration texture etch are assessed. Etch surface geometries are quantified in terms of the tilt and azimuth angles of the texture features on a per orientation basis. In the case of saw-damage etching, the {100}, {111}, {110}, {311} & {211} sets of crystallographic planes are stable to the etch. The resulting textures are too flat for multiple bounce incidence in air, with only 1.6% of the multicrystalline wafer surface calculated to have facet tilt angles above 45° whereby double bounce incidence is guaranteed. For texture etching, it is found that contrary to the accepted principles of texture etching, not only {111} planes are stable to etching but the whole range of {XXY} crystallographic planes between these and {110} orientations, challenging the validity of the accepted theory. The orientations in the vicinity of the (100) yield (tilted) pyramid structures with etch facets angled up to 54.7°, whereby 13% of the multicrystalline etch surface has tilt angles above 45°, and reflectances are 3% lower than for saw-damage etched wafers in air. However, under encapsulation, both saw-damage and texture etched multicrystalline wafers couple light more effectively into the silicon. Encapsulated reflectances compare only 7 and 5.5% higher respectively than upright pyramid textures on monocrystalline (100) silicon, compared to 18 and 15% higher in air. This is because a far larger proportion of the multicrystalline wafer is facetted at tilt angles greater than the 20.9° satisfying the condition for total internal reflection of escaping light at the glass-air interface. Light trapping is also found to be dependent upon the facet angles of the geometrical surface texture. Considering the principal triangle of (100):(110):(111) orientations, for saw-damage etching, central orientations around the (321) with the highest facet tilt angles, provide high levels of light trapping which with a back surface reflector can approach Lambertian levels. In contrast, the flat surfaces yielded on saw-damage etched (100) and (111) orientations have poor light trapping properties. For texture etching, light trapping is greatest for the highly facetted pyramidal textures on near (100) orientations, decreasing to the levels of polished silicon for the flat etching {XXY} orientations. The particularly poor light trapping for the {XXY} texture etched orientations means that overall, saw-damage etched multicrystalline wafers have higher levels of light trapping (in terms of the absorption efficiency of light after its initial coupling into the silicon) than texture etched multicrystalline wafers etched to the same depth. However, front surface reflection, particularly under encapsulation, has a far greater influence upon the electrical output achievable than light trapping for the 200 µm thick multicrystalline wafers investigated. Thus texture etched multicrystalline wafers, with lower reflectance by virtue of the particularly high facet angles (up to 55°) present upon (tilted) pyramid textures, have slightly higher maximum short circuit current values than saw-damage etched wafers