Data-parallel programming facilitates elegant specification of concurrency. However, the composability of data-parallel operations so far has been constrained by the requirement to have only at data- parallel operation at runtime. In this paper, we present early results on our work to exploit hardware support for nested concurrency to directly map nested data-parallel operations in high-level specifications to low- level codes that can be efficiently executed. To this effect, we have devised a compilation scheme from data-parallel operations in SaC to the systems programming language of the Microgrid architecture. Furthermore, we present early empirical results to assert the viability of our approach
Data flow techniques have been around since the early ’70s when they were used in compilers for seq...
In previous work, we have proposed a multithreaded execution model for describing nested data-parall...
The success of parallel architectures has been limited by the lack of high-level parallel programmin...
Abstract. Data-parallel programming facilitates elegant specification of concurrency. However, the c...
We present preliminary results from compiling the high-level, functional and data-parallel programmi...
Contemporary parallel microprocessors exploit Chip Multiprocessing along with Single Instruction, Mu...
[[abstract]]A systematic procedure for designing pipelined data-parallel algorithms that are suitabl...
This paper describes an implementation technique for integrating nested data parallelism into an obj...
The Sparc T3-4 server provides up to 512 concurrent hardware threads, a degree of concurrency that i...
The Sparc T3-4 server provides up to 512 concurrent hardware threads, a degree of concurrency that i...
Data flow techniques have been around since the early ’70s when they were used in compilers for sequ...
Development of parallel software is a very complex task. Many details, such as domain type, partitio...
Data-parallel languages, such as H scIGH P scERFORMANCE F scORTRAN or F scORTRAN D, provide a machin...
This paper describes the integration of nested data parallelism into imperative languages using the ...
Application specific MPSoCs are often used to implement high-performance data-intensive applications...
Data flow techniques have been around since the early ’70s when they were used in compilers for seq...
In previous work, we have proposed a multithreaded execution model for describing nested data-parall...
The success of parallel architectures has been limited by the lack of high-level parallel programmin...
Abstract. Data-parallel programming facilitates elegant specification of concurrency. However, the c...
We present preliminary results from compiling the high-level, functional and data-parallel programmi...
Contemporary parallel microprocessors exploit Chip Multiprocessing along with Single Instruction, Mu...
[[abstract]]A systematic procedure for designing pipelined data-parallel algorithms that are suitabl...
This paper describes an implementation technique for integrating nested data parallelism into an obj...
The Sparc T3-4 server provides up to 512 concurrent hardware threads, a degree of concurrency that i...
The Sparc T3-4 server provides up to 512 concurrent hardware threads, a degree of concurrency that i...
Data flow techniques have been around since the early ’70s when they were used in compilers for sequ...
Development of parallel software is a very complex task. Many details, such as domain type, partitio...
Data-parallel languages, such as H scIGH P scERFORMANCE F scORTRAN or F scORTRAN D, provide a machin...
This paper describes the integration of nested data parallelism into imperative languages using the ...
Application specific MPSoCs are often used to implement high-performance data-intensive applications...
Data flow techniques have been around since the early ’70s when they were used in compilers for seq...
In previous work, we have proposed a multithreaded execution model for describing nested data-parall...
The success of parallel architectures has been limited by the lack of high-level parallel programmin...