Design Space Exploration for Analog IPs using CAIRO+

International audienceIn this paper, a new methodology for design space exploration (DSE) and knowledge capture is presented. The methodology presents analog IPs as a hierarchy of devices and modules. The hierarchy is implemented using an analog language called CAIRO+. A mechanism, which is established between devices and modules, allows modules to question devices about their electrical behavior. The electrical properties propagate upward along the hierarchy in order to guide higher level modules. This methodology is used to capture and document the designer’s knowledge. Once captured, an executable generator is produced. This generator is then used to synthesize analog IPs with different specifications. The same generator can be used to migrate analog IPs between different technologies. As an illustrative example, a fully-differential two stages common-mode feedback (CMFB) amplifier is synthesized and migrated using CAIRO+