CMOS SiPM with integrated amplifier

The integration of silicon photomultiplier (SiPM) and frontend electronics in a suitable optoelectronic CMOS process is a promising approach to increase the versatility of single-photon avalanche diode (SPAD)-based singlephoton detectors. By integrating readout amplifiers, the device output capacitance can be reduced to minimize the waveform tail, which is especially important for large area detectors (>10 × 10mm2). Possible architectures include a single readout amplifier for the whole detector, which reduces the output capacitance to 1:1 pF at minimal reduction in detector active area. On the other hand, including a readout amplifier in every SiPM cell would greatly improve the total output capacitance by minimizing the influence of metal routing parasitic capacitance, but requiring a prohibitive amount of detector area. As tradeoff, the proposed detector features one readout amplifier for each column of the detector matrix to allow for a moderate reduction in output capacitance while allowing the electronics to be placed in the periphery of the active detector area. The presented detector with a total size of 1.7 X 1.0mm2 features 400 cells with a 50 μm pitch, where the signal of each column of 20 SiPM cells is summed in a readout channel. The 20 readout channels are subsequently summed into one output channel, to allow the device to be used as a drop-in replacement for commonly used analog SiPMs