A Novel Small Satellite Processor Architecture

Army Cost Efficient Spaceflight Research Experiments and Demonstrations (ACES RED) is an iterative, periodic flight experiment and demonstration effort to test singular phenomenologies, technologies, and concepts for future (S&T) projects that are directly related to and in support of the United States Army Space S&T Roadmap Programs. The first ACES RED experiment’s main focus is to generously expand the available dataset to verify long-duration performance of the MAI-400 attitude determination features and actuator durability as well as mature various commercial-off-the-shelf (COTS) technologies that will reduce the cost and complexity while maintaining performance of Army small satellites. This experiment will be mounted on the International Space Station with operation and access to continuous on-orbit data for greater than one year with reliable reference instrumentation. Realization with power-efficient microprocessors enables efficient implementation of redundancy concepts even at pico-satellite level (mass about 1 kg). At the example of the on-board-data-handling system (OBDH) of UWE-3 a first version of this approach is in orbit since November 2013. The microprocessors as well as the storage units are running in hot redundancy. As soon as deviations in outputs are detected, a watchdog is activated to identify by its FDIR software the faulty component. In almost real-time it directs responsibility to the correct unit and starts a recovery/rebooting process for the faulty unit. All this is handled internally in the OBDH, thus the functionality of the subsystem is not interrupted by this process and the satellite provides a continuous nominal operation. Similar approaches are transferred to the electronics of other safety critical subsystems like AOCS and power control, increasing the reliability of the overall satellite system despite just employing commercial components