Various novel processes permit integrating thin film semiconductor materials and devices using lift off, alignment, and deposition onto a host substrate. As a result, three dimensional integrated circuits can be constructed. Three dimensional communication in an integrated circuit can be implemented via electromagnetic communication between emitters and detectors fabricated via the novel processes. Integrated circuit layers are transparent to the electromagnetic signals propagated from the emitter and received by the detector. Furthermore, arrays of optical detectors can be implemented to perform image processing with tremendous speed. Processing circuitry can be situated directly below the optical detectors to process in massive parallel s...
The development of an innovative CCD/CMOS VLSI technology specially designed to produce application ...
In this work we make steps forwards developing a low-temperature technology intended for the fabrica...
Most of the wafer level 3-D technologies are using Through-Silicon Vias (TSV). The main barriers for...
Three dimensional communication within an integrated circuit occurs via electromagnetic communicatio...
The multimaterial integration of thin-film optoelectronic devices with host substrates ranging from ...
Various novel lift-off and bonding processes (60, 80, 100) permit lift-off of thin film materials an...
Integrated optoelectronic interconnects offer a potentially lower cost, higher density alternative t...
Novel processes permit integrating thin film semiconductor materials and devices using epitaxial lif...
This paper presents a three-dimensional, highly parallel, optically interconnected system to process...
Knipp D, Stiebig H, Kluth O, Wagner H. Novel three dimensionally integrated thin film color detector...
The device density of Integrated Circuits (ICs) manufactured by current VLSI technology is reaching ...
Optical interconnects can offer small footprint, high bandwidth density and high data rates compared...
Separating the substrate allows thin layers of III-V photonic semiconductor materials and devices to...
Includes bibliographical references (page 51)This project report covers two important aspects of the...
The invention is a simple method to fabricate multiple layers of transistors with one on top of each...
The development of an innovative CCD/CMOS VLSI technology specially designed to produce application ...
In this work we make steps forwards developing a low-temperature technology intended for the fabrica...
Most of the wafer level 3-D technologies are using Through-Silicon Vias (TSV). The main barriers for...
Three dimensional communication within an integrated circuit occurs via electromagnetic communicatio...
The multimaterial integration of thin-film optoelectronic devices with host substrates ranging from ...
Various novel lift-off and bonding processes (60, 80, 100) permit lift-off of thin film materials an...
Integrated optoelectronic interconnects offer a potentially lower cost, higher density alternative t...
Novel processes permit integrating thin film semiconductor materials and devices using epitaxial lif...
This paper presents a three-dimensional, highly parallel, optically interconnected system to process...
Knipp D, Stiebig H, Kluth O, Wagner H. Novel three dimensionally integrated thin film color detector...
The device density of Integrated Circuits (ICs) manufactured by current VLSI technology is reaching ...
Optical interconnects can offer small footprint, high bandwidth density and high data rates compared...
Separating the substrate allows thin layers of III-V photonic semiconductor materials and devices to...
Includes bibliographical references (page 51)This project report covers two important aspects of the...
The invention is a simple method to fabricate multiple layers of transistors with one on top of each...
The development of an innovative CCD/CMOS VLSI technology specially designed to produce application ...
In this work we make steps forwards developing a low-temperature technology intended for the fabrica...
Most of the wafer level 3-D technologies are using Through-Silicon Vias (TSV). The main barriers for...