Compact Modeling of SiC Insulated Gate Bipolar Transistors

This thesis presents a unified (n-channel and p-channel) silicon/silicon carbide Insulated Gate Bipolar Transistor (IGBT) compact model in both MAST and Verilog-A formats. Initially, the existing MAST model mobility equations were updated using recently referenced silicon carbide (SiC) data. The updated MAST model was then verified for each device tested. Specifically, the updated MAST model was verified for the following IGBT devices and operation temperatures: n-channel silicon at 25 ˚C and at 125 ˚C; n-channel SiC at 25 ˚C and at 175 ˚C; and p-channel SiC at 150 ˚C and at 250 ˚C. Verification was performed through capacitance, DC output characteristics, and turn-off transient simulations. The validated MAST model was then translated into the Verilog-A language, and the Verilog-A model results were validated against the updated MAST model