A new sample-and-hold circuit based on the charge sampling technique is introduced, which integrates input current instead of tracking input voltage to realize high speed and low voltage sampling. Both the theoretical analysis and the experimental results prove that it can realize both sample-and-hold and amplification functions. A 500 MS/s charge sampling circuit is implemented in 0.25 μm CMOS process and measured. The dynamic range reaches 42 dB within the 250 MHz bandwidth. The power consumption is about 5 mW
A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of...
This brief focuses on the performance analysis of general charge-sampling circuits for signal captur...
Abstract—This paper presents a sample-and-hold design that is based on a switched-op-amp topology. C...
The analysis of general charge sampling technique is presented in this thesis. Charge sampling integ...
Browse > Conferences> ASIC, 2001. Proceedings. 4th I ... A low-voltage high-speed sampling technique...
A novel low-power and high-performance sampleand-hold (S/H) front-end suitable for pipelined and cyc...
This paper compares two different sampling techniques, charge sampling and conventional voltage samp...
A charge sampling mixer with embedded and programmable filter function is described, which is not ba...
A sample and hold circuit is used as a front-end sampler for the analog-to-digital converters. High-...
Implemented in front of the comparator arrays, the sample-and-hold (S/H) or track-and-hold (T/H) cir...
65 p.A new ultra low power sample and hold circuit (S/H) has been proposed in this thesis. Taking in...
Solutions for the design of low-voltage sample-andhold (S/H) circuits in CMOS nanometer technologies...
A switched capacitor sample-and-hold (S/H) circuit with extended dynamic range beyond the supply vol...
This paper presents a sampling technique with reduced distortion for use in a sample-and-hold circui...
This Paper presents the design of low voltage sample and hold amplifier for analog to digital conver...
A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of...
This brief focuses on the performance analysis of general charge-sampling circuits for signal captur...
Abstract—This paper presents a sample-and-hold design that is based on a switched-op-amp topology. C...
The analysis of general charge sampling technique is presented in this thesis. Charge sampling integ...
Browse > Conferences> ASIC, 2001. Proceedings. 4th I ... A low-voltage high-speed sampling technique...
A novel low-power and high-performance sampleand-hold (S/H) front-end suitable for pipelined and cyc...
This paper compares two different sampling techniques, charge sampling and conventional voltage samp...
A charge sampling mixer with embedded and programmable filter function is described, which is not ba...
A sample and hold circuit is used as a front-end sampler for the analog-to-digital converters. High-...
Implemented in front of the comparator arrays, the sample-and-hold (S/H) or track-and-hold (T/H) cir...
65 p.A new ultra low power sample and hold circuit (S/H) has been proposed in this thesis. Taking in...
Solutions for the design of low-voltage sample-andhold (S/H) circuits in CMOS nanometer technologies...
A switched capacitor sample-and-hold (S/H) circuit with extended dynamic range beyond the supply vol...
This paper presents a sampling technique with reduced distortion for use in a sample-and-hold circui...
This Paper presents the design of low voltage sample and hold amplifier for analog to digital conver...
A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of...
This brief focuses on the performance analysis of general charge-sampling circuits for signal captur...
Abstract—This paper presents a sample-and-hold design that is based on a switched-op-amp topology. C...