This paper presents a constructive algorithm for memory-aware task assignment and scheduling, which is a part of the prototype system MATAS. The algorithm is well suited for image and video processing applications which have hard memory constraints as well as constraints on cost, execution time, and resource usage. Our algorithm takes into account code and data memory constraints together with the other constraints. It can create pipelined implementations. The algorithm finds a task assignment, a schedule, and data and code memory placement in memory. Infeasible solutions caused by memory fragmentation are avoided. The experiments show that our memory-aware algorithm reduces memory utilization compared to greedy scheduling algorithm which h...
International audienceIn this paper, we present an efffficient algorithm for compile time scheduling ...
Abstract In this paper, we propose, design, implement, and evaluate a CPU sched-uler and a memory ma...
(eng) The memory usage of sparse direct solvers can be the bottleneck to solve large-scale problems....
This paper presents a constructive algorithm for memory-aware task assignment and scheduling, which ...
Abstract. This paper presents a simple, but powerful memory-aware scheduling mechanism that adaptive...
Achieving optimal throughput by extracting parallelism in behavioral synthesis often exaggerates mem...
Abstract. Applications for system on chips become more and more complex. Also the number of availabl...
Scheduling and executing software efficiently on contemporary embedded systems, featuring heterogene...
The increasing use of audio, video and other multimedia applications on workstations, man-dates the ...
In recent times, there are increasing numbers of computer vision and pattern recognition (CVPR) tech...
International audienceWe present a joint scheduling and memory allocation algorithm for efficient ex...
International audienceVideo decoding and image processing in embedded systems are subject to strong ...
International audienceVideo decoding and image processing in embedded systems are subject to strong ...
This paper presents an exploration framework which performs data assignment and access scheduling ex...
Loop pipelining is a scheduling technique widely used to improve the performance of systems running ...
International audienceIn this paper, we present an efffficient algorithm for compile time scheduling ...
Abstract In this paper, we propose, design, implement, and evaluate a CPU sched-uler and a memory ma...
(eng) The memory usage of sparse direct solvers can be the bottleneck to solve large-scale problems....
This paper presents a constructive algorithm for memory-aware task assignment and scheduling, which ...
Abstract. This paper presents a simple, but powerful memory-aware scheduling mechanism that adaptive...
Achieving optimal throughput by extracting parallelism in behavioral synthesis often exaggerates mem...
Abstract. Applications for system on chips become more and more complex. Also the number of availabl...
Scheduling and executing software efficiently on contemporary embedded systems, featuring heterogene...
The increasing use of audio, video and other multimedia applications on workstations, man-dates the ...
In recent times, there are increasing numbers of computer vision and pattern recognition (CVPR) tech...
International audienceWe present a joint scheduling and memory allocation algorithm for efficient ex...
International audienceVideo decoding and image processing in embedded systems are subject to strong ...
International audienceVideo decoding and image processing in embedded systems are subject to strong ...
This paper presents an exploration framework which performs data assignment and access scheduling ex...
Loop pipelining is a scheduling technique widely used to improve the performance of systems running ...
International audienceIn this paper, we present an efffficient algorithm for compile time scheduling ...
Abstract In this paper, we propose, design, implement, and evaluate a CPU sched-uler and a memory ma...
(eng) The memory usage of sparse direct solvers can be the bottleneck to solve large-scale problems....