Reducing computational complexity of branch metric calculations in a trellis decoder

Trellis decoding is widely used, in this present day of communication and data storage, in a wide variety of applications such as decoding convolution codes, baseband detection for wireless systems and also to detect recorded data. This is achieved by implementing the Viterbi algorithm. This paper presents various methodologies of reducing the computational complexity of the branch metric unit in a trellis decoder. Further, a new methodology identified by us, which can be used to simplify the computations further, has been discussed. The adoption of this method, has been verified in a 0.13μ standard CMOS process, which shows 60% reduction in area as compared to the designs incorporating the existing methodologies