A novel reconfigurable pipelined A/D conversion technique for multistandard wideband receivers

This paper presents a low complexity, yet power efficient technique to boost the flexibility of a pipelined ADC. It also presents an implementation proposal with simulated results for a reconfigurable pipelined ADC. The proposed ADC architecture is a combination of the conventional pipelined ADC and the cyclic ADC, giving it a very low level of complexity, a high level of component reuse and substantial power savings in low speed low accuracy modes