Add to ORKGThis presentation will discuss the considerations an engineer should take to perform Single Event Effects (SEE) testing on GPU devices. Notable topics will include setup complexity, architecture insight which permits cross platform normalization, acquiring a reasonable detail of information from the test suite, and a few lessons learned from preliminary testing
This is a NASA Electronics Parts and Packaging (NEPP) independent investigation to determine the sin...
Motivation for this work is: (1) Accurately characterize digital signal processor (DSP) core single-...
When performing a single event effect (SEE) test during a test campaign, flexibility and out of the ...
This presentation will include information about Graphics Processor Units (GPUs) technology, NASA El...
Microprocessor, Graphics Processing Units (GPUs) and DDRx memory devices have emerged as promising n...
This presentation will include information about Graphics Processing Unit (GPU) technology, NASA Ele...
This presentation provides a NASA Electronic Parts and Packaging (NEPP) Program update of independen...
A standardized test method has been created to characterize and stress graphics processing units (GP...
The following are updated or new subjects added to the FPGA SEE Test Guidelines manual: academic ver...
The following are updated or new subjects added to the FPGA SEE Test Guidelines manual: academic ver...
A standardized test method has been created to characterize and stress graphics processing units (GP...
While standards and guidelines for performing SEE testing have existed for several decades, guidance...
A viewgraph presentation on the development of a low cost, high speed tester reconfigurable Field Pr...
This presentation provides an overview of single event effects in FPGA devices 2015-2016 including c...
The use of complex single and multicore processors with significant cache memory, on-chip peripheral...
This is a NASA Electronics Parts and Packaging (NEPP) independent investigation to determine the sin...
Motivation for this work is: (1) Accurately characterize digital signal processor (DSP) core single-...
When performing a single event effect (SEE) test during a test campaign, flexibility and out of the ...
This presentation will include information about Graphics Processor Units (GPUs) technology, NASA El...
Microprocessor, Graphics Processing Units (GPUs) and DDRx memory devices have emerged as promising n...
This presentation will include information about Graphics Processing Unit (GPU) technology, NASA Ele...
This presentation provides a NASA Electronic Parts and Packaging (NEPP) Program update of independen...
A standardized test method has been created to characterize and stress graphics processing units (GP...
The following are updated or new subjects added to the FPGA SEE Test Guidelines manual: academic ver...
The following are updated or new subjects added to the FPGA SEE Test Guidelines manual: academic ver...
A standardized test method has been created to characterize and stress graphics processing units (GP...
While standards and guidelines for performing SEE testing have existed for several decades, guidance...
A viewgraph presentation on the development of a low cost, high speed tester reconfigurable Field Pr...
This presentation provides an overview of single event effects in FPGA devices 2015-2016 including c...
The use of complex single and multicore processors with significant cache memory, on-chip peripheral...
This is a NASA Electronics Parts and Packaging (NEPP) independent investigation to determine the sin...
Motivation for this work is: (1) Accurately characterize digital signal processor (DSP) core single-...
When performing a single event effect (SEE) test during a test campaign, flexibility and out of the ...