Partitioning Methods for Satisfiability Testing on Large Formulas

AbstractMethods for partitioning large propositional formulas are investigated, with the goal of producing a set of smaller formulas whose satisfiability can be determined within reasonable time frames by known algorithms. CNF formula partitioning can be viewed as hypergraph partitioning, which has been studied extensively in VLSI design. Although CNF formulas have been considered as hypergraphs before, we found that this viewpoint was not productive for partitioning, and we introduce a new viewpoint in the dual hypergraph. Hypergraph partitioning technology from VLSI design is adapted to this problem. The overall goal of satisfiability testing requires criteria different from those used in VLSI design. Several heuristics are described and investigated experimentally. Some formulas from circuit applications that were extremely difficult or impossible for existing algorithms have been solved. However, the method is not useful on formulas with little or no structure, such as randomly generated formulas