This paper deals with the problem of increasing the reliability of gate-type logical circuits through the use of redundancy. We will derive a lower bound on the amount of redundancy necessary to achieve a certain error correcting ability and show how this bound varies with the complexity of the elements used in the design of the redundant circuit, measured by the number of inputs. The complexity of encoders of block codes for transmission of information is defined. A bound similar to the one mentioned above on the error correcting ability of codes is derived which depends on the codes' rate of transmission and on the complexity of their encoders. Finally, we establish a connection between the bound on the error correcting ability of a redun...
This paper obtains new lower bounds for the redundancy of both arbitrary and constant-weight binary ...
Given a Boolean circuit C, we wish to convert it to a circuit C′ that computes the same function as ...
AbstractFor ordinary circuits with a fixed upper bound on the fanin of its gates it has been shown t...
This paper deals with the problem of increasing the reliability of gate-type logical circuits throug...
Cover title.Includes bibliographical references (p. 8).Research supported by the NSF. ECS-8552419 Re...
A proof is provided that a logarithmic redundancy factor is necessary for the reliable computation o...
A proof is provided that a logarithmic redundancy factor is necessary for the reliable computation o...
A multiplexing scheme designed to increase the reliability of logical networks that consist of thres...
As techniques for fault-tolerant quantum computation keep improving, it is natural to ask: what is t...
With improvements in achievable redundancy for fault-tolerant quantum computing, it is natural to as...
AbstractWe investigate a model of gate failure for Boolean circuits in which a faulty gate is restri...
We report on two types of results. The first is a study of the rate of decay of information carried ...
We report on two types of results. The first is a study of the rate of decay of information carried ...
With the increasing demand for more durable products, the necessity of designing more resilient prod...
AbstractWe investigate a model of gate failure for Boolean circuits in which a faulty gate is restri...
This paper obtains new lower bounds for the redundancy of both arbitrary and constant-weight binary ...
Given a Boolean circuit C, we wish to convert it to a circuit C′ that computes the same function as ...
AbstractFor ordinary circuits with a fixed upper bound on the fanin of its gates it has been shown t...
This paper deals with the problem of increasing the reliability of gate-type logical circuits throug...
Cover title.Includes bibliographical references (p. 8).Research supported by the NSF. ECS-8552419 Re...
A proof is provided that a logarithmic redundancy factor is necessary for the reliable computation o...
A proof is provided that a logarithmic redundancy factor is necessary for the reliable computation o...
A multiplexing scheme designed to increase the reliability of logical networks that consist of thres...
As techniques for fault-tolerant quantum computation keep improving, it is natural to ask: what is t...
With improvements in achievable redundancy for fault-tolerant quantum computing, it is natural to as...
AbstractWe investigate a model of gate failure for Boolean circuits in which a faulty gate is restri...
We report on two types of results. The first is a study of the rate of decay of information carried ...
We report on two types of results. The first is a study of the rate of decay of information carried ...
With the increasing demand for more durable products, the necessity of designing more resilient prod...
AbstractWe investigate a model of gate failure for Boolean circuits in which a faulty gate is restri...
This paper obtains new lower bounds for the redundancy of both arbitrary and constant-weight binary ...
Given a Boolean circuit C, we wish to convert it to a circuit C′ that computes the same function as ...
AbstractFor ordinary circuits with a fixed upper bound on the fanin of its gates it has been shown t...