Traditional bulk silicon encounters performance limitations in shrinking CMOS transistor feature size to 65nm. But, through the use of silicon-germanium, strained silicon, and silicon-on-insulator and, ultimately, germanium-on-insulator technology, the life of silicon substrates could be stretched as far as the 22nm generation
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, ...
In this work, we have developed two different fabrication processes for relaxed Si₁₋xG...
peer reviewedDifferent methods to introduce strain in thin silicon device layers are presented. Unia...
Traditional bulk silicon encounters performance limitations in shrinking CMOS transistor feature siz...
Strain techniques, such as incorporating SiGe, should boost performance in future generations of CMO...
peer reviewedSSOI substrates were successfully fabricated using He+ ion implantation and annealing t...
AbstractAs silicon-germanium heterojunction bipolar transistors continue to break speed records, inc...
peer reviewedAs scaling of the critical transistor dimensions below 65 nm has been slowed down, the ...
The short-channel performance of compressively strained Si0.77Ge0.23 pMOSFETs with HfSiOx/TiSiN gate...
textAfter the integrated circuit was invented in 1959, complementary metal-oxidesemiconductor (CMOS...
textSince the introduction of MOSFETs into the integrated circuit (IC), performance has been improv...
AbstractGene Fitzgerald of MIT (and Amberwave Inc) discussed the history of strained silicon. He exp...
Biaxial tensile strained Si grown on SiGe virtual substrates will be incorporated into future genera...
The short-channel performance of compressively strained Si0.77Ge0.23 pMOSFETs with HfSiOx/TiSiN gate...
The semiconductor industry’s relentless effort to extract enhanced performance from MOS transistors ...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, ...
In this work, we have developed two different fabrication processes for relaxed Si₁₋xG...
peer reviewedDifferent methods to introduce strain in thin silicon device layers are presented. Unia...
Traditional bulk silicon encounters performance limitations in shrinking CMOS transistor feature siz...
Strain techniques, such as incorporating SiGe, should boost performance in future generations of CMO...
peer reviewedSSOI substrates were successfully fabricated using He+ ion implantation and annealing t...
AbstractAs silicon-germanium heterojunction bipolar transistors continue to break speed records, inc...
peer reviewedAs scaling of the critical transistor dimensions below 65 nm has been slowed down, the ...
The short-channel performance of compressively strained Si0.77Ge0.23 pMOSFETs with HfSiOx/TiSiN gate...
textAfter the integrated circuit was invented in 1959, complementary metal-oxidesemiconductor (CMOS...
textSince the introduction of MOSFETs into the integrated circuit (IC), performance has been improv...
AbstractGene Fitzgerald of MIT (and Amberwave Inc) discussed the history of strained silicon. He exp...
Biaxial tensile strained Si grown on SiGe virtual substrates will be incorporated into future genera...
The short-channel performance of compressively strained Si0.77Ge0.23 pMOSFETs with HfSiOx/TiSiN gate...
The semiconductor industry’s relentless effort to extract enhanced performance from MOS transistors ...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, ...
In this work, we have developed two different fabrication processes for relaxed Si₁₋xG...
peer reviewedDifferent methods to introduce strain in thin silicon device layers are presented. Unia...
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