TRAMS Project: Variability and Reliability of SRAM Memories in sub-22nm Bulk-CMOS Technologies
- Canal, R.
- Rubio, A.
- Asenov, A.
- Brown, A.
- Miranda, M.
- Zuber, P.
- Gonzalez, A.
- Vera, X.
DOIAbstract
AbstractThe TRAMS (Terascale Reliable Adaptive MEMORY Systems) project addresses in an evolutionary way the ultimate CMOS scaling technologies and paves the way for revolutionary, most promising beyond-CMOS technologies. In this abstract we show the significant variability levels of future 18 and 13nm device bulk-CMOS technologies as well as its dramatic effect on the yield of memory cells and circuits
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