Characterization and Modeling of Substrate Trapping in HEMTs

We present a novel and simple model of FET trapping based on a study of HEMTs using pulse techniques. This model accounts for the observed variation of extent of gate lag with bias and step potentials, and the variation of gate-lag time constant with drain potential. Because both charge capture and emission are accounted for, the model is appropriate for the simulation of both large-signal and small-signal dynamics. The model is verified by comparison with large-signal transient measurements and is consistent with small-signal gain measurements.4 page(s