The operations analysis and equipment evaluations pertinent to the design of an automated production facility capable of manufacturing beam-lead CMOS integrated circuits are reported. The overall plan shows approximate cost of major equipment, production rate and performance capability, flexibility, and special maintenance requirements. Direct computer control is compared with supervisory-mode operations. The plan is limited to wafer processing operations from the starting wafer to the finished beam-lead die after separation etching. The work already accomplished in implementing various automation schemes, and the type of equipment which can be found for instant automation are described. The plan is general, so that small shops or large pro...
commercial processes into the design of space electronics is a desirable, cost-effective way to leve...
The CMOS/SOS design rules prepared by the RCA Solid State Technology Center (SSTC) are described. Th...
Several cycles of photoetching, dopant deposition, and drive-in produce selectively-doped regions an...
The electroepitaxial process and the Very Large Scale Integration (VLSI) circuits (chips) facilities...
Automation reuirements were developed for two manufacturing concepts: (1) Gallium Arsenide Electroep...
The two manufacturing concepts developed represent innovative, technologically advanced manufacturin...
Design and performance of logic circuit chip for computerized design of MOS integrated circuit array
Chemical etching for automatic processing of integrated circuits is discussed. The wafer carrier and...
A low cost, quick turnaround technique for generating custom metal oxide semiconductor arrays using ...
Digital subsystem design and development employing n-channel and p-channel in MOS FET units in compl...
A semiconductor diffusion and oxidation facility (totally automated) was developed. Wafers arrived o...
Data for the beam-leaded silicon-on-sapphire (SOS) process using the TA5388 dual-complementary pair ...
Since 1985, the Naval Ocean Systems Center has been identifying and developing needed technology for...
Contains an introduction, principal objectives and accomplishments for this chapter's research, repo...
The complete sequence used to manufacture complementary metal oxide semiconductor (CMOS) integrated ...
commercial processes into the design of space electronics is a desirable, cost-effective way to leve...
The CMOS/SOS design rules prepared by the RCA Solid State Technology Center (SSTC) are described. Th...
Several cycles of photoetching, dopant deposition, and drive-in produce selectively-doped regions an...
The electroepitaxial process and the Very Large Scale Integration (VLSI) circuits (chips) facilities...
Automation reuirements were developed for two manufacturing concepts: (1) Gallium Arsenide Electroep...
The two manufacturing concepts developed represent innovative, technologically advanced manufacturin...
Design and performance of logic circuit chip for computerized design of MOS integrated circuit array
Chemical etching for automatic processing of integrated circuits is discussed. The wafer carrier and...
A low cost, quick turnaround technique for generating custom metal oxide semiconductor arrays using ...
Digital subsystem design and development employing n-channel and p-channel in MOS FET units in compl...
A semiconductor diffusion and oxidation facility (totally automated) was developed. Wafers arrived o...
Data for the beam-leaded silicon-on-sapphire (SOS) process using the TA5388 dual-complementary pair ...
Since 1985, the Naval Ocean Systems Center has been identifying and developing needed technology for...
Contains an introduction, principal objectives and accomplishments for this chapter's research, repo...
The complete sequence used to manufacture complementary metal oxide semiconductor (CMOS) integrated ...
commercial processes into the design of space electronics is a desirable, cost-effective way to leve...
The CMOS/SOS design rules prepared by the RCA Solid State Technology Center (SSTC) are described. Th...
Several cycles of photoetching, dopant deposition, and drive-in produce selectively-doped regions an...