Two VLSI processors for 1D wavelet transform

International audienceWavelet transform coding has been drawing much attention because of its ability to decompose images into a hierarchical structure that is suitable for adaptive processing in the transform domain. This paper presents two efficient and optimized VLSI design of One Dimensional Direct Discrete Wavelet transform processor. The proposed architectures compute three DWT stages and use four parallel filters. The architectures are simple and offers 16-bit precision on input and output data. No memory or registers are used for storing intermediate results. Furthermore, data scheduling and memory management remain very simple. The end result is two efficient VLSI implementations (using CMOS O.6 µm technology)