Updates on the Security of FPGAs Against Power Analysis Attacks

Abstract. This paper reports on the security of cryptographic algo-rithms implemented on FPGAs against power analysis attacks. We first present some improved experiments against these reconfigurable devices, due to an improved measurement process. Although it is usually believed that FPGAs are noisy targets for such attacks, it is shown that simple power consumption models can nearly perfectly correlate with actual measurements. Then, we evaluate how these correlation values depend on the resources used in the FPGAs. Finally, we investigate the possibil-ity to counteract these attacks by using random pre-charges in the de-vices and determine how this technique allows a designer to increase the security of an implementation. These results confirm that side-channel attacks present a serious threat for most microelectronic devices, includ-ing FPGAs. To conclude, we discuss the security vs. efficiency tradeoffs.