Charting CEBL’s Role in Mainstream Semiconductor Lithography

E-Beam direct writing (EBDW) requires no masks and affords high resolution. But its slow writing speed has historically kept it out of mainstream fabs. Thanks to continuing EBDW advances combined with the industry’s move to unidirectional (1D) gridded layout style, EBDW may soon provide a cost-efficient complement to 193nm ArF immersion (193i) optical lithography in high volume manufacturing (HVM). Patterning conventional two-directional (2D) design layouts with 193i is a major roadblock in device scaling: the resolution limitations of optical lithography equipment have led to higher mask cost and increased lithography complexity. To overcome these challenges, IC designers have switched to 1D layouts with “lines and cuts ” in critical layers. 1 Leading logic and memory chipmakers have for several years been producing advanced designs with lines-and-cuts in HVM. However, cut masks in multiple optical patterning are getting extremely costly. Yan Borodovsky envisioned Complementary Lithography in which another lithography technology could be used to pattern line-cuts in critical layers to complement optical lithography. 2 Complementary E-Beam Lithography (CEBL) has emerged as a strong candidate to pattern the Cuts of optically printed Lines. As the CEBL concept and other EBDW approaches continue to gain industry-wide awareness, concerns about throughput, scaling, and data preparation rate must be fully addressed. This paper examines the following issues: Challenges of massively parallel pixel writing (MPPW) Multiple mini-column design/architecture can: o Boost CEBL throughput o Resolve issues of CD control, CDU, LER, data prep rate, higher resolution, and 450mm wafers CEBL’s role in next-generation semiconductor lithograph