CLOCKING AND SYNCHRONIZATION WITHIN A FAULT-TOLERANT MULTIPROCESSOR

In this thesis the synchronization requirements of a fault-tolerant multiprocessor are defined and methods of main-tenance of synchronism are developed. It is demonstrated that a synchronous fault-tolerant multiprocessor driven by.a fault-tolerant clock is more efficient and more easily impleinented than is an asynchronous fault-tolerant multiprocessor. Fault-tolerant clocking has been examined intensively here. From fault-tolerance requirements and the established multiprocessor synchronization requirements, general specifi-cations are developed for a fault-tolerant clock. Two general methods of design have been explored, and it has been concluded that if the clock is to be distributed to many modules, fault-tolerant clocking through the concepts advanced by William Daly and John McKenna of the C.S. Draper Laboratory, is more practi-cal to implement than is fault-tolerant clocking through failure-detection and subsequent clock substitution. Clocks developed by Daly and McKenna have been examined, refined, and revised. It is demonstrated that it is desirable to have available a fault-tolerant clock which runs at 20 MHz, but that such a frequency is not achieveable by a McKenna-type clock (with use of current technology). A method of achieving the use of a relatively slow McKenna-type clock in conjunction with a fre-quency multiplier is developed. Also, analog phase-locking techniques are shown to be unsuitable for the design of a fault-tolerant clock