In this thesis, I describe the design and implementation of a software data cache for speculative loads in the SUDS (Software Undo System) runtime system. The ba-sic functionality of this cache exploits short-term temporal locality and some spatial locality in the memory accesses of speculative processing elements. The cache imple-mentation is also extended to exploit temporal locality of accesses on a longer time scale. Using four sample applications, I compare the performance of the caching ver-sion of the SUDS runtime system to the performance of the original SUDS runtime system and to the performance of optimized sequential versions of the applications. With software data caching, the sample applications demonstrate speedups of 20% to 3...
With the software applications increasing in complexity, description of hardware is becoming increas...
RAMAPRASAD, HARINI Analytically Bounding Data Cache Behavior for Real-Time Sys-tems. (Under the dire...
Software transactional memory (STM) is a promising programming paradigm for shared memory multithrea...
As VLSI chip sizes and densities increase, it becomes possible to put many processing elements on a ...
As VLSI chip sizes and densities increase, it becomes possible to put many processing elements on a ...
This paper describes a General-Purpose Software cache (GPS cache) which can improve the performance ...
The performance of cache memories relies on the locality exhibited by programs. Traditionally this l...
Cache memory in processors is used to store temporary copies of the data and instructions a running ...
A software cache implements instruction and data caching entirely in software. Dynamic binary rewrit...
In this paper we propose an instruction to accelerate software caches. While DMAs are very efficient...
Computer system performance has been pushed further and further for decades, and hence the complexit...
Abstract—We investigated a software cache for PGAS PUT and GET operations. The cache is implemented ...
The growing complexity of modern computer architectures increasingly complicates the prediction of t...
The growing gap between processor clock speed and DRAM access time puts new demands on software and ...
The verification and validation requirements set on high-integrity real-time systems demand the prov...
With the software applications increasing in complexity, description of hardware is becoming increas...
RAMAPRASAD, HARINI Analytically Bounding Data Cache Behavior for Real-Time Sys-tems. (Under the dire...
Software transactional memory (STM) is a promising programming paradigm for shared memory multithrea...
As VLSI chip sizes and densities increase, it becomes possible to put many processing elements on a ...
As VLSI chip sizes and densities increase, it becomes possible to put many processing elements on a ...
This paper describes a General-Purpose Software cache (GPS cache) which can improve the performance ...
The performance of cache memories relies on the locality exhibited by programs. Traditionally this l...
Cache memory in processors is used to store temporary copies of the data and instructions a running ...
A software cache implements instruction and data caching entirely in software. Dynamic binary rewrit...
In this paper we propose an instruction to accelerate software caches. While DMAs are very efficient...
Computer system performance has been pushed further and further for decades, and hence the complexit...
Abstract—We investigated a software cache for PGAS PUT and GET operations. The cache is implemented ...
The growing complexity of modern computer architectures increasingly complicates the prediction of t...
The growing gap between processor clock speed and DRAM access time puts new demands on software and ...
The verification and validation requirements set on high-integrity real-time systems demand the prov...
With the software applications increasing in complexity, description of hardware is becoming increas...
RAMAPRASAD, HARINI Analytically Bounding Data Cache Behavior for Real-Time Sys-tems. (Under the dire...
Software transactional memory (STM) is a promising programming paradigm for shared memory multithrea...