Comparative Study of Random Telegraph Noise in

A new type of multigate MOSFET, called the junctionless (JL) transistor, has recently been proposed [1]. It avoids junction formation problem and can be used to make very short-channel devices [2]. In such a device the channel is located inside of the Si nanowire, which results in considerable smaller electric field and reduced carrier scattering inside the channel [3]. This work addresses generation of random telegraph noise (RTN) in JL MOSFETs and where comparison with nanowire inversion mode (IM) devices. The devices were fabricated on standard Unibond SOI wafers with a 340 nm top silicon layer and a 400nm buried oxide. The SOI layer was thinned down to 10-15 nm and patterned into silicon nanowires using e-beam lithography. The width of the final silico