Design of Parallel Systems for Signal Processing

This report concludes phase I of the project. Two significant accomplishments are reported, the first relating to the design of heterogeneous parallel systems, and the second related to the synthesis of parallel programs for the CM-5 from Thinking Machines. A methodology for design and evaluation of parallel architectures with heterogeneous compo-nents has been developed. Specifically, the "communicating processes " (CP) domain in Ptolemy has been used to model heterogenous parallel hardware systems. Our first demonstra-tion design uses the "ALPS " concept (Alternative Low-level Primitive Structures). Use of the CP domain is a departure from our proposal, where we had proposed to use a discrete-event model. We have determined, however, that the CP model is considerably more convenient for high-level design of heterogeneous parallel hardware. The CP domain in Ptolemy has a multi-W tasking kernel managing concurrent processes. A process, or thread, is created for each com-1ý c putational and communications system resource in a particular design. The CP model of coin-L putation makes it easy to write and interconnect a variety of computational resources and-ýq simulate the execution of an application to evaluate the particular architectural configuration. We have developed a Target in Ptolemy for the CM-5 from Thinking Machines Inc. The pro-0S] cessing nodes of the CM-5 (Sparc processors with dedicated network interfaces) match wel