This paper proposes a multiobjective application mapping technique targeted for large-scale network-on-chip (NoC). As the number of intellectual property (IP) cores in multiprocessor system-on-chip (MPSoC) increases, NoC application mapping to find optimum core-to-topology mapping becomes more challenging. Besides, the conflicting cost and performance trade-off makes multiobjective application mapping techniques even more complex. This paper proposes an application mapping technique that incorporates domain knowledge into genetic algorithm (GA). The initial population of GA is initialized with network partitioning (NP) while the crossover operator is guided with knowledge on communication demands. NP reduces the large-scale application mapp...
Networks-on-Chip (NoC) is a communication paradigm for Systems-on-Chip (SoC). NoC design flow contai...
This thesis investigates network on chip (NoC) architecture, most particularly, NoC mapping algorith...
The authors proposes a fast hierarchical multi-objective mapping approach (HMMap) for mesh-based NoC...
Network-on-chip (NoC) has been introduced as a promising on-chip communication architecture to suppo...
Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special ...
Abstract—Current SoC design trends are characterized by the integration of larger amount of IPs targ...
Power optimization is an important part of network-on-chip(NoC) design. This paper proposes an impro...
Current SoC design trends are characterized by the integration of larger amount of IPs targeting a w...
This paper presents a genetic based approach to the partitioning and mapping of multicore SoC cores ...
In this paper, we have proposed a model for design space exploration of a mesh based Network on Chip...
Mapping application task graphs on intellectual property (IP) cores into network-on-chip (NoC) is a ...
In this paper, an efficient mapping of intellectual property (IP) cores onto a scalable multiprocess...
In this paper, an efficient mapping of intellectual property (IP) cores onto a scalable multiprocess...
Network-on-chip (NoC) is becoming important as the communication structure of the MPSoC (Multi-proce...
Network on chip (NoC) is a promising communication infrastructure for multiple cores on a chip to ex...
Networks-on-Chip (NoC) is a communication paradigm for Systems-on-Chip (SoC). NoC design flow contai...
This thesis investigates network on chip (NoC) architecture, most particularly, NoC mapping algorith...
The authors proposes a fast hierarchical multi-objective mapping approach (HMMap) for mesh-based NoC...
Network-on-chip (NoC) has been introduced as a promising on-chip communication architecture to suppo...
Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special ...
Abstract—Current SoC design trends are characterized by the integration of larger amount of IPs targ...
Power optimization is an important part of network-on-chip(NoC) design. This paper proposes an impro...
Current SoC design trends are characterized by the integration of larger amount of IPs targeting a w...
This paper presents a genetic based approach to the partitioning and mapping of multicore SoC cores ...
In this paper, we have proposed a model for design space exploration of a mesh based Network on Chip...
Mapping application task graphs on intellectual property (IP) cores into network-on-chip (NoC) is a ...
In this paper, an efficient mapping of intellectual property (IP) cores onto a scalable multiprocess...
In this paper, an efficient mapping of intellectual property (IP) cores onto a scalable multiprocess...
Network-on-chip (NoC) is becoming important as the communication structure of the MPSoC (Multi-proce...
Network on chip (NoC) is a promising communication infrastructure for multiple cores on a chip to ex...
Networks-on-Chip (NoC) is a communication paradigm for Systems-on-Chip (SoC). NoC design flow contai...
This thesis investigates network on chip (NoC) architecture, most particularly, NoC mapping algorith...
The authors proposes a fast hierarchical multi-objective mapping approach (HMMap) for mesh-based NoC...