SystemC is the de facto system modeling language, and verification of SystemC models is a major research direction. Assertion-Based Monitoring is a dynamic verification technique that allows the user to dynamically verify formal properties of the system by automatically generating runtime monitors from them. A typical hardware-software system is concurrent and reactive. Examples of such systems can be a computer, an ATM server etc. Such systems perform multiple jobs of different types during their execution. For example, different types of jobs in a computer can be ‘launching a web browser’, ‘searching the file system’ etc. A job can be submitted by an external user or generated by an internal component of the system. A job can begin at any...
[[abstract]]Multi-threading and multi-core technology introduce more computing power to software sys...
International audienceThe TLM modeling level of the SystemC language emphasizes the transactions in ...
In this paper we present a formal verification approach for abstract SystemC models. The approach al...
Abstract—SystemC is the de facto standard system-modeling language for hardware-software systems. A ...
This paper describes FLAVERS, a finite-state verification approach that analyzes whether concurrent ...
The pervasiveness of computer systems in virtually every aspect of daily life entails a growing depe...
Abstract—This paper evaluates the concurrent error detection capabilities of system-level checks, us...
A novel approach for formal verification of SystemC designs is presented which is based on static an...
Today’s complex systems are modeled on a high level of abstraction. In this context, C/C++-based des...
SystemC is a system-level modeling language that offers a wide range of features to describe concurr...
ABSTRACT SystemC has emerged lately as a de facto, open, industry standard modeling language, enabli...
Abstract. The growing popularity of SystemC has attracted research aimed at the formal verification ...
SystemC has emerged lately as a de facto, open, industry standard modeling language, enabling a wide...
SystemC has emerged lately as a de facto, open, industry standard modeling language, enabling a wide...
In model-driven development of reactive systems, statecharts are widely used for formal description ...
[[abstract]]Multi-threading and multi-core technology introduce more computing power to software sys...
International audienceThe TLM modeling level of the SystemC language emphasizes the transactions in ...
In this paper we present a formal verification approach for abstract SystemC models. The approach al...
Abstract—SystemC is the de facto standard system-modeling language for hardware-software systems. A ...
This paper describes FLAVERS, a finite-state verification approach that analyzes whether concurrent ...
The pervasiveness of computer systems in virtually every aspect of daily life entails a growing depe...
Abstract—This paper evaluates the concurrent error detection capabilities of system-level checks, us...
A novel approach for formal verification of SystemC designs is presented which is based on static an...
Today’s complex systems are modeled on a high level of abstraction. In this context, C/C++-based des...
SystemC is a system-level modeling language that offers a wide range of features to describe concurr...
ABSTRACT SystemC has emerged lately as a de facto, open, industry standard modeling language, enabli...
Abstract. The growing popularity of SystemC has attracted research aimed at the formal verification ...
SystemC has emerged lately as a de facto, open, industry standard modeling language, enabling a wide...
SystemC has emerged lately as a de facto, open, industry standard modeling language, enabling a wide...
In model-driven development of reactive systems, statecharts are widely used for formal description ...
[[abstract]]Multi-threading and multi-core technology introduce more computing power to software sys...
International audienceThe TLM modeling level of the SystemC language emphasizes the transactions in ...
In this paper we present a formal verification approach for abstract SystemC models. The approach al...