A Digital PLL Based Downmix and Phase Detection Unit for Retro-Directive Antenna Systems

Retro-directive antennas are a promising technique for communication systems as they provide self-tracking of moving terminals. However, classic implementations are only able to re-transmit a received message and/or suffer from small realizable frequency gaps between received and transmitted signals. Recently, an analog system architecture based on phaselocked loops (PLLs) has been proposed which allows for large frequency gaps, different array geometries, and makes use of the array receive gain. In this work, we show a digital implementation of the proposed retro-directive transceiver which can be realized on a field-programmable gate array (FPGA). We demonstrate the phase detection and downmix performance by digital hardware simulation. The dynamic system behavior is shown in time domain. Suitability for communication systems is analyzed by subjecting the system to modulated signals