NETWORK ON CHIP BASED HARDWARE ACCELERATORS FOR COMPUTATIONAL BIOLOGY

Thesis (Ph.D.), School of Electrical Engineering and Computer Science, Washington State UniversityAs clock frequency of systems are no longer scaling, the computer architecture community is exploring different strategies to continue application scaling and also looking for novel applications which might benefit from this research. One such direction is the multi-core approach. The application problem is partitioned into smaller sub-problems and using the divide and conquer approach to solve the problem. Network on Chip offers a promising methodology to integrate a large number of cores onto a single chip and also efficiently manage the communication amongst them. The demand for high throughput, low power and low latency interconnection is pushing for the adoption of this scheme even further. Modern scientific computing is offering several challenging problems for the computer architecture community to work on. Computational biology is one such domain, where the problems of interest are data intensive, compute intensive, and communication intensive in variant combinations and one size does not fit all the applications. Biocomputing will therefore need architecture and resources that map to the diverse hardware portfolio. In this work, the complete design and performance evaluation has been carried out for two such biocomputing applications namely sequence alignment and phylogenetic reconstruction. Major challenge in both the problems, arises out of the limitation of the available on-chip memory, which puts a bound on the amount of scalability of the problem size. It is been demonstrated that significant amount of speedup can be achieved for problems of manageable size, with much less power dissipation compared to the currently available solutions.Department of Computer EngineeringElectrical Engineering, Washington State Universit