We developed an Asynchronous DC-free Serial Address-Event Representation (AS-AER) protocol. It allows for full-duplex communication and explicit flow control, does not require any clock data recovery or accurate clock relationship between the transmitter and receiver, and is based on AC-coupling that galvanically isolates communicating devices. The proposed reference implementation does not require any specific hardware and can be implemented on low-cost FPGAs and eventually ASICs. Preliminary tests performed at raw bit transfer rate of 100 Mbps confirm a 32 bit maximum event rate of 2.9Meps. Further tests with 16 bit events show a good tolerance to the clock difference between transmitter and the receiver, with no errors for a frequency di...
Address-Event-Representation (AER) is a communications protocol for transferring images between chi...
Address-event-representation (AER) is a communications protocol for transferring spikes between bio-...
We present a power efficient clock-less fully asynchronous bit-serial Low Voltage Differential Signa...
We developed an Asynchronous DC-free Serial Address-Event Representation (AS-AER) protocol. It allow...
We developed an Impulse-Based Asynchronous Serial Address-Event Representation (IB-AS-AER) protocol....
Abstract — In recent years there have been an increasing number of research groups that have begun t...
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events...
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events...
In recent years there have been an increasing number of research groups that have begun to develop m...
Address-Event-Representation (AER) is a widely extended asynchronous technique for interchanging “n...
The emergence of Address-Event Representation (AER) as a general communications method across a larg...
This work is the result of the definition, design and evaluation of a novel method to interconnect t...
Address event representation (AER) is a widely employed asynchronous technique for interchanging “ne...
(UART) implements serial communication between peripherals and remote embedded systems. The UART pro...
This paper presents the design and simulation of an LVDS transceiver intended to be used in serial ...
Address-Event-Representation (AER) is a communications protocol for transferring images between chi...
Address-event-representation (AER) is a communications protocol for transferring spikes between bio-...
We present a power efficient clock-less fully asynchronous bit-serial Low Voltage Differential Signa...
We developed an Asynchronous DC-free Serial Address-Event Representation (AS-AER) protocol. It allow...
We developed an Impulse-Based Asynchronous Serial Address-Event Representation (IB-AS-AER) protocol....
Abstract — In recent years there have been an increasing number of research groups that have begun t...
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events...
Address-Event-Representation (AER) is a communication protocol for transferring asynchronous events...
In recent years there have been an increasing number of research groups that have begun to develop m...
Address-Event-Representation (AER) is a widely extended asynchronous technique for interchanging “n...
The emergence of Address-Event Representation (AER) as a general communications method across a larg...
This work is the result of the definition, design and evaluation of a novel method to interconnect t...
Address event representation (AER) is a widely employed asynchronous technique for interchanging “ne...
(UART) implements serial communication between peripherals and remote embedded systems. The UART pro...
This paper presents the design and simulation of an LVDS transceiver intended to be used in serial ...
Address-Event-Representation (AER) is a communications protocol for transferring images between chi...
Address-event-representation (AER) is a communications protocol for transferring spikes between bio-...
We present a power efficient clock-less fully asynchronous bit-serial Low Voltage Differential Signa...