A novel timing-error based approach for high speed highly linear Mixing-DAC architectures

In current steering Mixing-DACs with local mixing, timing errors between the current cells is a major concern. This paper considers two types of random timing errors: delay and duty-cycle. Analysis shows that the Mixing-DAC is sensitive to delay errors, but much less sensitive to duty-cycle errors. For the required high spectral purity of future 4GHz multicarrier GSM (SFDRRBW =85dBc), the delay spread s(delay) should b