Scratchpad memories (SPMs) have become a promising on-chip storage solution for embedded systems from an energy, performance and predictability perspective. The thermal behavior of these types of memories has not been considered in detail. The thermal behavior in silicon devices plays an important role in the reliability of these systems and static (leakage) power consumption. In this short note, we outline a scheme to reduce the peak temperature and thermal cycling of SPMs in applications that have regular access patterns on their data structures. The key idea of our method is to physically distribute these accesses evenly over the whole memory area
1 Alexander Neckar was affiliated with Northwestern University when this work was performed. The per...
Nowadays, many embedded processors include in their architecture on-chip static memories, so called ...
In this paper we address the problem of on-chip mem-ory selection for computationally intensive appl...
Scratchpad memories (SPMs) have become a promising on-chip storage solution for embedded systems fro...
Scratchpad memories (SPMs) have become a promising on-chip storage solution for embedded systems fro...
In VLSI systems-on-chips (SoC), leakage is expected to override 50% of the total power consumption, ...
[[abstract]]DRAM is usually used as main memory for program execution. The thermal behavior of a mem...
Current trends indicate that leakage energy consumption will be an important concern in upcoming pro...
Decreasing power consumption in small devices such as handhelds, cell phones and high-performance pr...
The design of future high-performance embedded systems is hampered by two problems: First, the requi...
Abstract—Each semiconductor technology generation brings us closer to the imminent processor archite...
The hybrid memory architecture that contains both on-chip cache and scratchpad memory (SPM) has been...
Abstract — Memories are increasingly dominating Systems on Chip (SoC) designs and thus contribute a ...
Abstract—We propose a code scratchpad memory (SPM) management technique with demand paging for embed...
Abstract—Code repositioning is a well-known method of reducing inefficient off-chip memory accesses ...
1 Alexander Neckar was affiliated with Northwestern University when this work was performed. The per...
Nowadays, many embedded processors include in their architecture on-chip static memories, so called ...
In this paper we address the problem of on-chip mem-ory selection for computationally intensive appl...
Scratchpad memories (SPMs) have become a promising on-chip storage solution for embedded systems fro...
Scratchpad memories (SPMs) have become a promising on-chip storage solution for embedded systems fro...
In VLSI systems-on-chips (SoC), leakage is expected to override 50% of the total power consumption, ...
[[abstract]]DRAM is usually used as main memory for program execution. The thermal behavior of a mem...
Current trends indicate that leakage energy consumption will be an important concern in upcoming pro...
Decreasing power consumption in small devices such as handhelds, cell phones and high-performance pr...
The design of future high-performance embedded systems is hampered by two problems: First, the requi...
Abstract—Each semiconductor technology generation brings us closer to the imminent processor archite...
The hybrid memory architecture that contains both on-chip cache and scratchpad memory (SPM) has been...
Abstract — Memories are increasingly dominating Systems on Chip (SoC) designs and thus contribute a ...
Abstract—We propose a code scratchpad memory (SPM) management technique with demand paging for embed...
Abstract—Code repositioning is a well-known method of reducing inefficient off-chip memory accesses ...
1 Alexander Neckar was affiliated with Northwestern University when this work was performed. The per...
Nowadays, many embedded processors include in their architecture on-chip static memories, so called ...
In this paper we address the problem of on-chip mem-ory selection for computationally intensive appl...
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