Architecture Selection for a Multi-Standard DECT/Bluetooth Front-End in 0.18 µm CMOS

Architecture selection is one of the key steps in a multi-standard front-end design flow. By choosing a suitable front-end architecture, problems in the building block design (DC-offsets, flicker noise, high power consumption) can be avoided. In this paper the selection of the most suitable architecture for a multi-standard front-end for DECT and Bluetooth is presented. An important selection criterion is the flexibility of an architecture for different wireless standards, but some other selection criteria are also used: robustness of an architecture to the technology scaling, level of integration, image rejection, power consumption and chip area. Taking into account the fact that modern CMOS technologies migrate fast towards deep submicron processes and in order to alleviate a front-end redesign in new CMOS technologies, special attention is paid to develop a realistic scaling scenario end to evaluate their consequences on the architecture selection. Starting from a generic front-end architecture, six architectures are evaluated. According to a qualitative analysis, a quadrature low-IF architecture with adaptive image rejection shows the best performance considering the selection criteria