A fractional-N frequency synthesizer-based multi-standard I/Q carrier generation system in0.13μm CMOS

This paper proposes a sigma- delta fractional-N frequency synthesizer-based multi-standard I/Q carrier generation system. With reasonable frequency planning, the system can be used in multi-standard wireless communication applications(GSM, WCDMA, GPRS, TD-SCDMA, WLAN(802.11a/b/g)). The implementation is achieved by a0.13μm RF CMOS process. The measured results demonstrate that three quadrature VCOs(QVCO) continuously cover the frequency from3.1 to6.1 GHz(65.2%), and through the successive divide-by-2 prescalers to achieve the frequency from0.75 to6.1 GHz continuously. The chip was fully integrated with the exception of an off-chip filter. The entire chip area is only3.78 mm2, and the system consumes a21.7 mA@1.2 V supply without output buffers. The lock-in time of the PLL frequency synthesizer is less than4μs over the entire frequency range with a direct frequency presetting technique and the auxiliary non-volatile memory(NVM) can store the digital configuration signal of the system, including presetting signals to avoid the calibration process case by case.?2011 Chinese Institute of Electronics