Add to ORKGThe solution time of analog multipliers using field-effect transistors is investigated. This time is ultimately limited by the charging time of the transistor junction. In typical devices suitable for analog multiplication, the charging time is found to be about 10 to 20 nsec for a multiplication error of < 1%. A four quadrant pulse amplitude multiplier circuit with a solution time equal to the transistor charging time is described. (auth
Two new analog squarer circuits employing only seven MOS transistors are proposed in this study. The...
A low-voltage analog multiplier operating at 1.2V is presented. The multiplier core consists of four...
This paper proposes presents a low power and highspeed four-quadrant analog multiplier in the curren...
An analog multiplier are circuits, that are realized multiplication of two analog signals. They can ...
An analogue computer multiplier provides the means of forming the product of two physical quantities...
Two new analog squarer circuits employing only seven MOS transistors are proposed in this study. The...
A multiplier circuit used in digital electronics is basically to multiply two or more numbers. Multi...
International Telemetering Conference Proceedings / October 13-16, 1986 / Riviera Hotel, Las Vegas, ...
A novel 4-quadrant analog multiplier using Floating Gate MOS (FGMOS) transistors operating in satura...
Analog Multiplier is an electronic device that performs linear multiplication of two continual input...
It was intended when the year began to examine the different methods of electronic analogue multipli...
The operating characteristics of junction field-effect transistors and insulated-gate field-effect t...
With the latter part of the last century in mind, it is not hard to imagine that in the foreseeable ...
This thesis is concerned with the arithmetic circuitry of a time-sequential pulse-position-modulatio...
This work describes the design, construction, and testing of a digital-to-analog function generator ...
Two new analog squarer circuits employing only seven MOS transistors are proposed in this study. The...
A low-voltage analog multiplier operating at 1.2V is presented. The multiplier core consists of four...
This paper proposes presents a low power and highspeed four-quadrant analog multiplier in the curren...
An analog multiplier are circuits, that are realized multiplication of two analog signals. They can ...
An analogue computer multiplier provides the means of forming the product of two physical quantities...
Two new analog squarer circuits employing only seven MOS transistors are proposed in this study. The...
A multiplier circuit used in digital electronics is basically to multiply two or more numbers. Multi...
International Telemetering Conference Proceedings / October 13-16, 1986 / Riviera Hotel, Las Vegas, ...
A novel 4-quadrant analog multiplier using Floating Gate MOS (FGMOS) transistors operating in satura...
Analog Multiplier is an electronic device that performs linear multiplication of two continual input...
It was intended when the year began to examine the different methods of electronic analogue multipli...
The operating characteristics of junction field-effect transistors and insulated-gate field-effect t...
With the latter part of the last century in mind, it is not hard to imagine that in the foreseeable ...
This thesis is concerned with the arithmetic circuitry of a time-sequential pulse-position-modulatio...
This work describes the design, construction, and testing of a digital-to-analog function generator ...
Two new analog squarer circuits employing only seven MOS transistors are proposed in this study. The...
A low-voltage analog multiplier operating at 1.2V is presented. The multiplier core consists of four...
This paper proposes presents a low power and highspeed four-quadrant analog multiplier in the curren...